This invention relates to an analogue-to-digital converter circuit arrangement having an input and an output and comprising a variable-gain amplifier and/or attenuator and an analogue-to-digital converter circuit in cascade in that order in a signal path from said input to said output and a reference signal source having its output coupled to the input of the amplifier and/or attenuator.
Arrangements of this general kind are well-known. The variable-gain amplifier and/or attenuator is provided in order that the arrangement can accommodate a wide range of input signal values with satisfactory relative resolution. In its absence relatively small input signal values would occupy only a small part of the total dynamic range of the converter circuit (the total number of quantization levels which the circuit is capable of resolving) so that the number of these levels available for resolving these small values would itself be comparatively small; the size of each of the quantization steps would be a comparatively significant proportion of the actual value of the input signal. If the gain of the amplifier and/or attenuator is increased under such conditions the value of the signal applied to the actual converter circuit can be increased so that it occupies a comparatively large part of the total dynamic range, thereby improving its relative resolution. The resulting output of the converter circuit will still be representative of the value of the input signal, provided that the amplifier/attenuator gain is taken into account.
A problem with many of the known arrangements is that the amplifier/attenuator gain is not an accurately known and/or stable function of whatever means (e.g. a control signal) is employed to vary it, so that the gain at any given time cannot be accurately deduced by simple examination of these means. One way of overcoming this problem, known from U.S. Pat. No. 4,616,329, is to switch the arrangement to a calibration mode after the amplifier/attenuator gain has been adjusted to accommodate a given input signal. During the calibration phase the input signal is replaced by a succession of accurately known reference levels and the resulting outputs from the converter circuit are stored, thereby providing a record of the overall amplitude transfer function of the arrangement at the particular gain setting and enabling the output obtained in response to the actual input signal to be adjusted to take this into account. It will be appreciated, however, that such a calibration phase occupies a significant amount of time, this being time when the arrangement cannot be used for its purpose of converting the input signal. This may result in the rate at which the input signal can be sampled being reduced to an undesirably low value, particularly when the amplitude/attenuator gain is changed frequently as will often be the case if this is done adaptively in response to the current average input or output signal level of the arrangement. It is an object of the present invention to mitigate this disadvantage.